In today's mobile radio systems, various mobile radio standards such as the Global System for Mobile Communication, GSM, Enhanced Data Rates for GSM Evolution EDGE, Universal Mobile Telecommunication Standard UMTS, or others are used. In this case, radio-frequency signals are used for transmission.
For generating, or receiving, the radio-frequency transmission and reception signals, digitally controlled oscillators, DCOs are increasingly being used today. As an output signal, a DCO generates a radio-frequency signal on the basis of a digital frequency word. In addition, a digital phase locked loop with a DCO requires less space on a semiconductor body than a corresponding phase locked loop with an analog-controlled voltage controlled oscillator, VCO.
By way of example, DCOs in arrangements for radio-frequency generation use binary-weighted capacitance chips to perform coarse frequency adjustment, while an arrangement with equally weighted, for example thermometer-encoded, capacitance chips regulates the oscillation frequency in operation precisely. The equally weighted capacitance chips can also be used for modulating a signal onto a fundamental of the DCO.
Systems with narrowband modulation, as in the case of GSM/EDGE, require very small frequency steps of approximately 10 kHz, whereas wideband modulation operations, as in UMTS, require a broad adjustment for the range DCO of several 100 MHz. The demands on small frequency steps and a large modulation bandwidth can be achieved with an array of equally weighted capacitance chips, for example with 512 capacitive elements, which are actuated by means of a 9-bit data word. To achieve a finer effective frequency resolution, sigma-delta modulators are used, which convert a non-integer, fractional component of a data word calculated by a digital loop filter into a radio-frequency, serial bit stream. In this case, the bit stream follows the fractional component on average over time. Individual capacitive elements of the capacitance array are therefore changed over very quickly on the basis of this bit stream in order to improve the effective frequency resolution.
A further property of sigma-delta modulators is the suppression of low-frequency quantization noise generated as a result of the switching of the capacitive elements. For this, sigma-delta modulators of relatively high order, particularly of second order, are used, for example.
FIG. 14 shows a conventional first-order sigma-delta modulator. An input 1 is supplied with a data word having a word length of eight bits. An eight-bit full adder 405 has a first input coupled to the input 1 and a second input coupled via a delay element 418 to the output of the adder 405. The word length of the result from the adder 405 is nine bits, made up of eight bits of result and one bit of carry. The carry is output as a serial bit stream on a modulator output 2.
FIG. 15 shows a conventional second-order sigma-delta modulator. An eight-bit result from the adder 405 is supplied to a further adder 505. The adder 505 likewise has a second input which is coupled via a delay element 518 to the output of the further adder 505. In this case, too, a carry bit is generated. The carry bits from the first and second adders 405 and 505 are supplied to a single-bit full adder 602, in this case once negatively via a delay element 603. The result of the addition by the adder 602 is output on the modulator output 2 as a serial bit stream with a word length of two bits.
To achieve the fine frequency resolution for GSM/EDGE despite the large physical frequency step size for adjusting the oscillation frequency in the DCO, a fractional component of eight bits at a clock frequency of approximately 1 GHz is required for the sigma-delta modulator. However, an eight-bit full adder, as shown in FIGS. 14 and 15, for example, is not able to ascertain a result at this clock frequency within one clock period of the sigma-delta modulator on account of the switching times of the logic gates in the adder. The sigma-delta modulator is therefore no longer able to operate in precise time synch.